1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, and more particularly to a nonvolatile semiconductor memory device employing a variable resistor that stores an electrically rewritable resistance value as data in a nonvolatile manner, and a production method thereof.
2. Description of the Related Art
There has conventionally been known a flash memory, as an electrically rewritable nonvolatile memory, which includes a memory cell array of NAND-connected or NOR-connected memory cells having a floating gate structure. A ferroelectric memory is also known as a nonvolatile fast random access memory.
On the other hand, technologies of pattering memory cells much finer include a resistance variable memory, which uses a variable resistor in a memory cell as proposed. Known examples of the variable resistor include a phase change memory element that varies the resistance in accordance with the variation in crystal/amorphous states of a chalcogenide compound; an MRAM element that uses a variation in resistance due to the tunnel magneto-resistance effect; a polymer ferroelectric RAM (PFRAM) memory element including resistors formed of a conductive polymer; and a ReRAM element that causes a variation in resistance upon electrical pulse application (Patent Document 1: Japanese Patent Application Laid-Open No. 2006-344349, paragraph 0021).
It has been known that there are two operation modes in the ReRAM variable resistor. One of them is such that the high-resistance state and the low-resistance state are changed by the control of the voltage value and the application time without changing the polarity of the applied voltage. This mode is referred to as a unipolar type. The other one is such that the high-resistance state and the low-resistance state are changed by changing the polarity of the applied voltage. This mode is referred to as a bipolar type.
Since the variable resistor and the rectifying element such as a diode are connected in series in the unipolar memory cell, the memory cells are easy to be stacked. Further, when the nonvolatile memory is configured three-dimensionally, high integration of the memory cell can be achieved (Patent Document 2: Japanese Patent Application Laid-Open No. 2005-522045). In the memory cell array using the unipolar memory cell employing a diode, all word lines have to rise when the memory cell is accessed, so that the first access is slow. Since many memory cells are inversely biased, the power consumption increases, which limits the through-put.
On the other hand, in the memory cell employing a transistor instead of a diode, only the selected word line and bit line may be moved upon the access to the memory cell, whereby the first access can be accelerated. Further, the power consumption can be reduced, and high through-put can be obtained. Moreover, the memory cell using a transistor can be operated as a bipolar memory cell by changing the polarity of the applied voltage with respect to the source voltage to the bit line and the word line. However, the integration is poorer than that of the memory cell using a diode, which is a problem.